The central processing unit (CPU)

The central processing unit (CPU) acts as the brain of a computer system, handling the processing of all data and instructions that enable the system to function. The CPU's performance depends on several characteristics, which determine how quickly and efficiently it can process tasks.

Key characteristics affecting CPU performance:

• Clock speed - This measures how many instructions the CPU can process per second, typically in gigahertz (GHz).
• Number of cores - A core is an independent processing unit within the CPU.
• Cache size - Larger cache provides more space for frequently used data.

The CPU connects to other system components through thousands of gold pins, some for transmitting data and others for supplying power.

Main components of the CPU

The CPU consists of three primary parts that work together to process instructions: the control unit, the arithmetic logic unit, and the cache. It also includes several registers for temporary data storage.

Control unit (CU)

The control unit (CU) oversees the entire CPU operation. It directs the fetching, decoding, and execution of program instructions by following a repeating process known as the fetch-execute cycle. The CU manages data movement within the CPU, such as to registers, the arithmetic logic unit, or cache. It also controls data flow outside the CPU, including to main memory and input/output devices.

Arithmetic logic unit (ALU)

The arithmetic logic unit (ALU) performs all mathematical and logical operations within the CPU. For arithmetic tasks, it handles basic addition and subtraction directly, while managing multiplication and division through repeated addition or subtraction. The ALU also compares numbers to determine their relative sizes. On the logic side, it executes operations like AND, OR, NOT, and binary shifts. Results from ALU operations are stored in a special register called the accumulator.

Cache

Cache is a small, high-speed memory within the CPU that stores frequently accessed data for quick retrieval. It is slower than registers but faster than random access memory (RAM). When the CPU needs data, it first checks the cache; if the data is not there, it fetches it from RAM. Cache has limited capacity and is more expensive than RAM or secondary storage.

Levels of cache:

• L1 cache - The fastest level with the smallest capacity.
• L2 cache - Slower than L1 but larger.
• L3 cache - Slower than L2 but with even greater capacity.

Registers

Registers are tiny, ultra-fast storage locations inside the CPU that hold small amounts of data temporarily during processing. They are quicker to access than any other memory type. Examples include the program counter, memory address register (MAR), memory data register (MDR), and accumulator.

Von Neumann architecture

Von Neumann architecture, proposed in 1945, forms the foundation of most modern computer systems. It describes a design where the CPU executes programs stored in memory, with both instructions and data sharing the same memory space. The architecture includes key components like the control unit, arithmetic logic unit, and specialised registers, all connected to enable data flow between the CPU, memory, input devices, and output devices.

Key features of Von Neumann architecture:

• Programs consist of instructions and data stored in memory addresses.
• The CPU fetches and processes these sequentially using a single shared memory for both instructions and data.
• Data flows between components via pathways, such as from memory to registers or the ALU.

This design revolutionised computing by enabling stored-program computers.

Registers in Von Neumann architecture

In Von Neumann architecture, specific registers play crucial roles in managing addresses, data, and calculations. These registers temporarily store information needed during the fetch-execute cycle.

Main registers and their functions:

• Program counter (PC) - Holds the memory address of the next instruction to be fetched and executed.
• Memory address register (MAR) - Stores the memory address that the CPU is about to access, whether for fetching data or an instruction.
• Memory data register (MDR) - Contains the actual data or instruction retrieved from or to be written to the address in the MAR.
• Accumulator - Stores intermediate results from arithmetic and logic operations performed by the ALU.

These registers facilitate efficient communication between the CPU and memory.

The fetch-execute cycle

The fetch-execute cycle, also known as the fetch-decode-execute cycle, is the fundamental process by which the CPU repeatedly carries out instructions from a program. This cycle runs billions of times per second. It consists of three main stages: fetch, decode, and execute, which loop continuously until the program halts.

Fetch stage

(1) Copy the memory address from the program counter (PC) to the memory address register (MAR). (2) Copy the instruction from the memory location specified in the MAR to the memory data register (MDR). (3) Increment the program counter to point to the address of the next instruction, preparing for the following cycle.

Decode stage

The control unit (CU) decodes the instruction stored in the MDR. This involves interpreting what the instruction requires, such as preparing registers like the MAR or MDR for the next action.

Execute stage

The CPU performs the decoded instruction.

Possible actions include:

• Loading data from memory into a register.
• Writing data from a register to memory.
• Performing a calculation or logic operation using the ALU, with results stored in the accumulator.
• Changing the address in the program counter.
• Halting the program if required.

After execution, the cycle repeats, starting again with the fetch stage from the updated program counter.